The idea was simple: replace all the NMOS based ROM ICs with a single CMOS based one, while not losing the ability to run DolphinDOS (or another custom KERNAL). Combine this idea with some of my traits, and the following set of objectives comes up:
  • drop-in type, single PCB adapter replacing all three ROM chips
  • as little glue logic as possible (glue chips need some mA(s) too)
  • no air-wires aka fly-wires - it has to “just work”, without wire-web around it
And since the combination of two KERNAL images, one BASIC image and one CHAROM image leaves enough room in the '256 ROM space to fit exactly one more character set, why not to allow the 64 to enjoy the same what C128 enjoys for so long - another character set and an “ASCII/DIN” switch? The last one was of course a trade-off vs. the second objective above, but I eventually decided that wasted ROM bits make me feel worse than an additional LS chip on board ;-)

With all the above in mind I went to the (IPS based) drawing board and designed the first version. Originally it was meant only for the “wide” boards with 0.8” ROM ICs placement raster (ASSY# 250407, 250425, 250441 (has anyone ever really seen this one??), 250466). I tested it in my 64 and it worked well. But it couldn’t be used in other boards’ variants. So I created a special layout version for 0.9” raster (like the SX-64 CPU board) but then there were still main boards with 1” raster (ASSY# 326298 and KU14194HB) and there were still “narrow” boards (ASSY # 250469 REV. A, REV.3, REV. 4 and REV. B), which required very much different approach due to their already combined BASIC and KERNAL ROMs in one chip. I thought “no.. that’s too many different layouts!”.

There was also one more thing. As I mentioned before, the latest main boards not only have two ROM chips instead of three but as a result of this, they also have the chips' selection signals combined. This effectively prevented any direct use of the original design without adding extra fly-wires! I discussed with Gerrit about how to approach the newer “narrow” boards and we brainstormed various options for some time but no solution seemed to be perfect. To be completely frank, none looked even “good enough”. It seemed like the “narrow” boards (two ROM ICs and two chip select lines combined with an OR gate) would require even more components on the daughter PCB than the “wide”/SX versions, where three chips were to be replaced - sic! I even designed the circuit for the newer main boards but I admit that I didn’t really like it and probably because of that I never went to the PCB design stage with it. As it turned later out - holding my horses paid off. Check the second version if you want to know what I talk about.